1. Field of the Invention
The present invention relates generally to the field of semiconductor integrated circuit devices. More particularly, the present invention relates to an improved integrated circuit chip and its interconnection scheme that are capable of reducing IR drop over the chip.
2. Description of the Prior Art
In the processes for designing a large-scale integrated semiconductor circuit device, respective blocks of the device are generally designed in parallel to complement device characteristics with one another. During the designing the large-scale device, the building-block type of method is utilized, in which the circuit of the device is divided into a plurality of circuit blocks and each of the circuit blocks is thus designed at the same time. The overall design of the device is then carried out by integrating these constituent blocks.
An integrated circuit (IC) usually has a larger number of circuit blocks and multiple levels of conductors are used to distribute power and signals from off the IC to the circuit blocks within the IC, between the circuit blocks, and between cells within each circuit block.
It is well known that the conductors are formed by lithographically patterning a layer of conductive material to form conductive lines as viewed from above the IC substrate. The conductive layers with conductive lines formed therein are isolated by an insulating layer so that lines of one layer which cross another layer do not physically or electrically contact each other. When it is desired to electrically couple a conductive line formed in one layer to a conductive line formed in another layer, a conductive via is formed extending through the insulating layer between the two conductors.
Typically, the topmost two levels of the interconnection metal layers are used for power and ground routing in an integrated circuit chip. However, this approach unavoidably induces high voltage drop (or IR drop), which results in increased power consumption and reduced signal timing speed. Therefore, there is a strong need in this industry to provide an improved power and ground routing for the integrated circuit chip devices that is capable of reducing the metal layer resistance, and thus lowering the IR drop over a chip, thereby improving the chip performance.